Aportaciones congreso (12) Publicaciones en las que ha participado algún/a investigador/a

1998

  1. A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic

    INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS

  2. Aplicación del modelo de transporte con limitación de vehículos de distribución, al caso de optimización de la flota de camiones de una empresa conservera

    X Reunión ASEPELT-España: Albacete, 20-21 junio 1996. Resumen de comunicaciones

  3. Combined transistor sizing with buffer insertion for timing optimization

    Proceedings of the Custom Integrated Circuits Conference

  4. Combined transistor sizing with buffer insertion for timing optimization

    IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS

  5. Efectividad de la cobertura en el mercado de futuros español

    Las finanzas del fin de siglo

  6. Efficient minarea retiming of large level-clocked circuits

    Proceedings -Design, Automation and Test in Europe, DATE

  7. Fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic

    Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

  8. Routing tree topology construction to meet interconnect timing constraints

    Proceedings of the International Symposium on Physical Design

  9. Technology mapping for domino logic

    IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

  10. Technology mapping for domino logic

    1998 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN

  11. Timing optimization of mixed static and domino logic

    Proceedings - IEEE International Symposium on Circuits and Systems

  12. Timing optimization of mixed static and domino logic

    ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6