(FCEE) Empresa

2000

1. A timing-constrained algorithm for simultaneous global routing of multiple nets

   IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

2. Capturing the effect of crosstalk on delay

   Proceedings of the IEEE International Conference on VLSI Design

3. Convex delay models for transistor sizing

   Proceedings - Design Automation Conference

4. Datapath routing based on a decongestion metric

   Proceedings of the International Symposium on Physical Design

5. Dual-monotonic domino gate mapping and optimal output phase assignment of domino logic

   Proceedings - IEEE International Symposium on Circuits and Systems

6. Dual-monotonic domino gate mapping and optimal output phase assignment of domino logic

   ISCAS 2000: IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - PROCEEDINGS, VOL II

7. Empresarios y mercado de trabajo

   Evolución y perspectivas del mercado de trabajo: actas del tercer Congreso de Economía de Navarra

8. Fast analysis and optimization of power/ground networks

   IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

9. Hierarchical analysis of power distribution networks

   37TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2000

10. MINFLOTRANSIT: Min-cost flow based transistor sizing tool

    37TH DESIGN AUTOMATION CONFERENCE, PROCEEDINGS 2000

11. MINFLOTRANSIT: min-cost flow based transistor sizing tool

    Proceedings - Design Automation Conference