Optimizing decoupling capacitors in 3D circuits for power grid integrity

  1. Zhou, P.
  2. Sridharan, K.
  3. Sapatnekar, S.S.
Revue:
IEEE Design and Test of Computers

ISSN: 0740-7475

Année de publication: 2009

Volumen: 26

Número: 5

Pages: 15-25

Type: Article

DOI: 10.1109/MDT.2009.120 GOOGLE SCHOLAR