Congestion-aware power grid optimization for 3D circuits using MIM and CMOS decoupling capacitors

  1. Zhou, P.
  2. Sridharan, K.
  3. Sapatnekar, S.S.
Konferenzberichte:
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

ISBN: 9781424427482

Datum der Publikation: 2009

Seiten: 179-184

Art: Konferenz-Beitrag

DOI: 10.1109/ASPDAC.2009.4796477 GOOGLE SCHOLAR