Buffering global interconnects in structured ASIC design

  1. Zhang, T.
  2. Sapatnekar, S.S.
Revue:
Integration, the VLSI Journal

ISSN: 0167-9260

Année de publication: 2008

Volumen: 41

Número: 2

Pages: 171-182

Type: Article

DOI: 10.1016/J.VLSI.2007.04.002 GOOGLE SCHOLAR