Optimal decoupling capacitor sizing and placement for standard-cell layout designs

  1. Su, H.
  2. Sapatnekar, S.S.
  3. Nassif, S.R.
Aldizkaria:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

ISSN: 0278-0070

Argitalpen urtea: 2003

Alea: 22

Zenbakia: 4

Orrialdeak: 428-436

Mota: Artikulua

DOI: 10.1109/TCAD.2003.809658 GOOGLE SCHOLAR