A timing-constrained simultaneous global routing algorithm

  1. Hu, J.
  2. Sapatnekar, S.S.
Aldizkaria:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

ISSN: 0278-0070

Argitalpen urtea: 2002

Alea: 21

Zenbakia: 9

Orrialdeak: 1025-1036

Mota: Artikulua

DOI: 10.1109/TCAD.2002.801083 GOOGLE SCHOLAR