Table look-up based compact modeling for on-chip interconnect timing and noise analysis

  1. Hu, HT
  2. Blaauw, DT
  3. Zolotov, V
  4. Sapatnekar, SS
Liburua:
PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV

ISBN: 0-7803-7761-3

Argitalpen urtea: 2003

Orrialdeak: 668-671

Biltzarra: IEEE International Symposium on Circuits and Systems

Mota: Biltzar ekarpena