Departamento académico
(FCEE) Empresa
Artículos (5) Publicaciones en las que ha participado algún/a investigador/a
1998
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An algorithm for simulating power/ground networks using padé approximants and its symbolic implementation
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 45, Núm. 10, pp. 1372-1382
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Efficient retiming of large circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 6, Núm. 1, pp. 74-83
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Interleaving buffer insertion and transistor sizing into a single optimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 6, Núm. 4, pp. 625-633
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Moment-based techniques for RLC clock tree construction
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, Vol. 45, Núm. 1, pp. 69-79
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SpeEding up Pipelined Circuits through a Combination of Gate Sizing and Clock Skew Optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 17, Núm. 2, pp. 173-182