A methodology and framework to assist in the architecture design and functional verification of complex electronic systems
- Tomasena, Koldo
- Igone Velez Isasmendi Director
- Juan Sevillano Berasategui Director
Defence university: Universidad de Navarra
Fecha de defensa: 12 July 2013
- Andrés García-Alonso Montoya Chair
- Andoni Irizar Picón Secretary
- Jon Legarda Macon Committee member
- Miguel Soto Rodríguez Committee member
- Francisco Javier del Pino Suárez Committee member
Type: Thesis
Abstract
An integrated, powerful and flexible development environment has been created in this research work in order to simulate and verify electronic systems starting from a very high abstraction level. The system architecture design, the algorithm tuning and the functional verification can be performed efficiently early in the development process by means the proposed contributions