A general approach for identifying hierarchical symmetry constraints for analog circuit layout

  1. Kunal, K.
  2. Poojary, J.
  3. Dhar, T.
  4. Madhusudan, M.
  5. Harjani, R.
  6. Sapatnekar, S.S.
Konferenzberichte:
IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

ISSN: 1092-3152

Datum der Publikation: 2020

Ausgabe: 2020-November

Art: Konferenz-Beitrag

DOI: 10.1145/3400302.3415685 GOOGLE SCHOLAR lock_openOpen Access editor
Datenquelle: Scopus