Optimized Pin Assignment for Lower Routing Congestion After Floorplanning Phase

  1. Zhang, T.
  2. Sapatnekar, S.S.
Aktak:
International Workshop on System Level Interconnect Prediction

Argitalpen urtea: 2002

Orrialdeak: 17-21

Mota: Biltzar ekarpena

DOI: 10.1145/505348.505352 GOOGLE SCHOLAR