Optimized Pin Assignment for Lower Routing Congestion After Floorplanning Phase

  1. Zhang, T.
  2. Sapatnekar, S.S.
Actes de conférence:
International Workshop on System Level Interconnect Prediction

Année de publication: 2002

Pages: 17-21

Type: Communication dans un congrès

DOI: 10.1145/505348.505352 GOOGLE SCHOLAR