Retiming control logic

  1. Maheshwari, N.
  2. Sapatnekar, S.S.
Revue:
Integration, the VLSI Journal

ISSN: 0167-9260

Année de publication: 1999

Volumen: 28

Número: 1

Pages: 33-53

Type: Article

DOI: 10.1016/S0167-9260(99)00010-3 GOOGLE SCHOLAR