Delay and area optimization for discrete gate sizes under double-sided timing constraints
- Chuang, Weitong
- Sapatnekar, Sachin S.
- Hajj, Ibrahim N.
Actas:
Proceedings of the Custom Integrated Circuits Conference
ISSN: 0886-5930
ISBN: 0780308263
Año de publicación: 1993
Tipo: Aportación congreso