Development of a low-power solar energy harvester pmu integrated circuit optimized for indoor environments
- López Gasso, Alberto
- Roque José Berenguer Pérez Director
- Andoni Beriain Director
Universidad de defensa: Universidad de Navarra
Fecha de defensa: 15 de diciembre de 2023
Tipo: Tesis
Resumen
Wireless electronic devices face a common and important constraint: the limited lifespan of their batteries. The concept of quasi-perpetual electronic devices, particularly for tiny and low-power electronic systems, is progressively becoming attainable. En-ergy harvesting can be the part of the solution by improving, attenuating or even eliminating this limitation by extending its autonomy. The final goal is to convert them into a virtually perpetual system. Energy Harvesting can be defined as the collection and storage of ambi-ent energy from the surroundings, to later convert it into electrical energy and use it to power a small and low-power electronic devices. These devices are often. The energy harvesting technique is intended to be used in devices where it is impractical or inconvenient to use traditional battery or grid power sources. Moreover, it have recently received more attention due to its in-creasing use in the Internet of Things (IoT) and the appearing of Wireless Sensor Networks (WSN). This work describes an energy-efficient monolithic Power Management Unit (PMU) that includes a charge pump adapted to photovoltaic cells with the capability of charging a large supply capacitor and managing the stored energy efficiently to provide the required supply voltage and power to low energy consumption wireless sensor nodes such as RFID sensor tags. The proposed system starts-up self-sufficiently with a light source lumi-nosity equal to or higher than 245 lux, meaning a voltage input of 595 mV using only a 1.42 cm2 solar cell. The result energy harvester integrates an energy monitor that gives the ability to supply autonomous sensor nodes with discontinuous operation modes. The full PMU occupies an area of 1.073 mm2 using a standard 180 nm CMOS technology. The half-floating architecture of the integrated charge pump avoids losses of charging the top/button plate of the stray capacitors in each clock cycle. Measurements’ results on a fabricated IC exhibit an an output power of 13.9 µW with 70.2 percent of peak-to-peak efficiency at indoor light conditions (680lux) with an output voltage of 2V.