An efficient algorithm for low power pass transistor logic synthesis

  1. Shelar, RS
  2. Sapatnekar, SS
Book:
ASP-DAC/VLSI DESIGN 2002: 7TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE AND 15TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS

ISBN: 0-7695-1441-3

Year of publication: 2002

Pages: 87-92

Congress: 7th Asia and South Pacific Design Automation Conference/15th International Conference on VLSI Design

Type: Conference paper

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Data source: WoS