A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic

  1. Jiang, YB
  2. Sapatnekar, SS
  3. Bamji, C
Buch:
INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS

ISBN: 0-8186-9099-2

Datum der Publikation: 1998

Seiten: 276-281

Kongress: International Conference on Computer Design: VLSI in Computers and Processors

Art: Konferenz-Beitrag

DOI: 10.1109/ICCD.1998.727062 GOOGLE SCHOLAR
Fuente de los datos: WoS