A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic

  1. Jiang, YB
  2. Sapatnekar, SS
  3. Bamji, C
Livre:
INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS

ISBN: 0-8186-9099-2

Année de publication: 1998

Pages: 276-281

Congreso: International Conference on Computer Design: VLSI in Computers and Processors

Type: Communication dans un congrès

DOI: 10.1109/ICCD.1998.727062 GOOGLE SCHOLAR

Objectifs de Développement Durable

La source de données: WoS