An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts

  1. Su, H.
  2. Sapatnekar, S.S.
  3. Nassif, S.R.
Aktak:
Proceedings of the International Symposium on Physical Design

Argitalpen urtea: 2002

Orrialdeak: 68-73

Mota: Biltzar ekarpena

DOI: 10.1145/505401.505405 GOOGLE SCHOLAR