An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts

  1. Su, H.
  2. Sapatnekar, S.S.
  3. Nassif, S.R.
Actes de conférence:
Proceedings of the International Symposium on Physical Design

Année de publication: 2002

Pages: 68-73

Type: Communication dans un congrès

DOI: 10.1145/505401.505405 GOOGLE SCHOLAR