An algorithm for optimal decoupling capacitor sizing and placement for standard cell layouts

  1. Su, H.
  2. Sapatnekar, S.S.
  3. Nassif, S.R.
Actas:
Proceedings of the International Symposium on Physical Design

Ano de publicación: 2002

Páxinas: 68-73

Tipo: Achega congreso

DOI: 10.1145/505401.505405 GOOGLE SCHOLAR