Circuit Performance Shifts Due to Layout-Dependent Stress in Planar and 3D-ICs

  1. Marella, S.K.
  2. Sapatnekar, S.S.
Zeitschrift:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1063-8210

Datum der Publikation: 2018

Ausgabe: 26

Nummer: 12

Seiten: 2907-2920

Art: Artikel

DOI: 10.1109/TVLSI.2018.2866290 GOOGLE SCHOLAR lock_openOpen Access editor