Technology mapping for SOI domino logic incorporating solutions for the parasitic bipolar effect

  1. Karandikar, S.K.
  2. Sapatnekar, S.S.
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1063-8210

Year of publication: 2003

Volume: 11

Issue: 6

Pages: 1094-1105

Type: Article

DOI: 10.1109/TVLSI.2003.817137 GOOGLE SCHOLAR
Data source: Scopus