Technology mapping for SOI domino logic incorporating solutions for the parasitic bipolar effect

  1. Karandikar, S.K.
  2. Sapatnekar, S.S.
Aldizkaria:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ISSN: 1063-8210

Argitalpen urtea: 2003

Alea: 11

Zenbakia: 6

Orrialdeak: 1094-1105

Mota: Artikulua

DOI: 10.1109/TVLSI.2003.817137 GOOGLE SCHOLAR
Datuen iturria: Scopus